#Start simulation, with the xilinx libraries and ps resolution
vsim -L UNISIM -L XILINXCORELIB -t ps work.top_level

#View the wave
view wave

#Set time units
formatTime +bestunits +commas


# TEST AF SP-REGISTER
# Data -> Cbus, Cbus -> SP, NyData -> Cbus, SP->Bbus

#RESET WAVE-DISPLAY
restart -force -nowave

# INITIALIZE SIGNALS
add wave -divider -noupdate "CLOCK"
# Add clock
add wave -noupdate  {sim:/top_level/clk_in }

add wave -noupdate  -divider "BUSES"
# Add Cbus & set radix to dec
add wave -noupdate -radix decimal {sim:/top_level/cbus }         
#property wave -radix decimal /top_level/cbus
# Add Bbus & set radix to dec
add wave -noupdate -radix decimal  {sim:/top_level/bbus }         
#property wave -radix decimal /top_level/bbus

add wave -noupdate  -divider "REGISTERS"
# Add SP-register & set radix to dec
add wave -noupdate -radix decimal {sim:/top_level/mar/content }   
#property wave -radix decimal /top_level/mar/content
add wave -noupdate -radix decimal {sim:/top_level/mdr/content }   
#property wave -radix decimal /top_level/mdr/content
add wave -noupdate -radix decimal {sim:/top_level/pc/content }   
#property wave -radix decimal /top_level/pc/content
add wave -noupdate -radix decimal {sim:/top_level/sp/content }   
#property wave -radix decimal /top_level/sp/content
add wave -noupdate -radix decimal {sim:/top_level/lv/content }   
#property wave -radix decimal /top_level/lv/content
add wave -noupdate -radix decimal {sim:/top_level/cpp/content }   
#property wave -radix decimal /top_level/cpp/content
add wave -radix decimal -noupdate {sim:/top_level/tos/content }   
#property wave -radix decimal /top_level/tos/content
add wave -radix decimal -noupdate {sim:/top_level/opc/content }   
#property wave -radix decimal /top_level/opc/content
add wave -radix decimal -noupdate {sim:/top_level/h/content }   
#property wave -radix decimal /top_level/h/content



add wave -noupdate -divider "WRITE-ENABLE controls"
# Add write-enable (SP-register)
add wave -noupdate {sim:/top_level/select_mar }    
add wave -noupdate {sim:/top_level/select_mdr }    
add wave -noupdate {sim:/top_level/select_pc }    
add wave -noupdate {sim:/top_level/select_sp }    
add wave -noupdate {sim:/top_level/select_lv }    
add wave -noupdate {sim:/top_level/select_cpp }    
add wave -noupdate {sim:/top_level/select_tos }    
add wave -noupdate {sim:/top_level/select_opc }
add wave -noupdate {sim:/top_level/select_h }

add wave -noupdate -divider "READ-ENABLE controls"

radix define B_bus_state {
16'b0000000000000000 "---",
16'b0000000000000001 "MDR",
16'b0000000000000010 "PC",
16'b0000000000000100 "MBR",
16'b0000000000001000 "MBRU",
16'b0000000000010000 "SP",
16'b0000000000100000 "LV",
16'b0000000001000000 "CPP",
16'b0000000010000000 "TOS",
16'b0000000100000000 "OPC",
16'b0000001000000000 "none",
16'b0000010000000000 "none",
16'b0000100000000000 "none",
16'b0001000000000000 "none",
16'b0010000000000000 "none",
16'b0100000000000000 "none",
16'b1000000000000000 "none"
-default hex
}

# Add read-enable (SP-register)
add wave -noupdate -radix B_bus_state {sim:/top_level/BselDemux}


#property wave -radix B_bus_state /top_level/BselDemux





# EXECUTE COMMANDS
# define clock to 20 ns
force -freeze sim:/top_level/clk_in 1 0, 0 {10 ns} -r 20ns              
# Reset read-enable for all registers
force -freeze sim:/top_level/mir(3:0) 4'D15
run 20ns
# Force data on C-bus "3"
force -freeze sim:/top_level/cbus 32'D3    
# Force write-enable (SP-register)
force -freeze sim:/top_level/mir(10) 1
run 20ns
# Force NOT write-enable (SP-register)
force -freeze sim:/top_level/mir(10) 0
run 20ns
# Force data on C-bus "12"
force -freeze sim:/top_level/cbus 32'D12    
run 20ns
# Force read-enable (SP-register)
force -freeze sim:/top_level/mir(3:0) 4'D4
run 20ns
# Force NOT read-enable (SP-register)
force -freeze sim:/top_level/mir(3:0) 4'D15
run 20ns

# SAVE RESULT
#write wave -start 0ns -end 120ns -perpage 120ns -landscape C:/HSC/MortenN/TESTresults/SP-test.ps

# Await user intervention
pause

#TEST IS COMPLETET WITH OUT ERRORS - Morten Nielsen, may 26. 2009

#===============================================================================

# Execute a Main1 instruction
#  this should result in
#  goto next instruction
#  fetch next instruction
#  increment program counter

#RESET WAVE-DISPLAY
restart -force -nowave

#Test Name "Main1" ref. to Structured Computer Organization p. 262
add wave -noupdate -divider "Instruction: Main1"

# INITIALIZE SIGNALS
add wave -noupdate -divider "CLOCK"
# Add clock
add wave -noupdate -label "Clock" {sim:/top_level/clk_in }
# define clock to 20 ns
force -freeze {sim:/top_level/clk_in} 1 0, 0 {10 ns} -r 20ns  

add wave -noupdate -divider "BUSES"
# Add Bbus & set radix to dec
add wave -noupdate -radix decimal -label "B-BUS" {sim:/top_level/bbus }         
#property wave -radix decimal "B-BUS"
# Add Cbus & set radix to dec
add wave -noupdate -radix decimal -label "C-BUS" {sim:/top_level/cbus }         
#property wave -radix decimal "C-BUS"


add wave -noupdate -divider "REGISTERS"
# Add SP-register & set radix to dec
add wave -noupdate -radix decimal -label "MAR" {sim:/top_level/mar/content }   
#property wave -radix decimal "MAR"
add wave -noupdate -radix decimal -label "MDR" {sim:/top_level/mdr/content }   
#property wave -radix decimal "MDR"
add wave -noupdate -label "PC" -radix decimal {sim:/top_level/pc/content }   
#property wave -radix decimal "PC"
add wave -noupdate -label "SP" -radix decimal {sim:/top_level/sp/content }   
#property wave -radix decimal "SP"
add wave -noupdate -label "LV" -radix decimal {sim:/top_level/lv/content }   
#property wave -radix decimal "LV"
add wave -noupdate -label "CPP" -radix decimal {sim:/top_level/cpp/content }   
#property wave -radix decimal "CPP"
add wave -noupdate -label "TOS" -radix decimal {sim:/top_level/tos/content }   
#property wave -radix decimal "TOS"
add wave -noupdate -label "OPC" -radix decimal {sim:/top_level/opc/content }   
#property wave -radix decimal "OPC"
add wave -noupdate -label "H" -radix decimal {sim:/top_level/h/content }   
#property wave -radix decimal "H"
add wave -noupdate -label "MBR" -radix hexadecimal {sim:/top_level/MBR/content }



add wave -noupdate -divider "WRITE-ENABLE controls"
# Add write-enable (SP-register)
add wave -noupdate -label "WE MAR" {sim:/top_level/select_mar }    
add wave -noupdate -label "WE MDR" {sim:/top_level/select_mdr }    
add wave -noupdate -label "WE PC"  {sim:/top_level/select_pc }    
add wave -noupdate -label "WE SP"  {sim:/top_level/select_sp }    
add wave -noupdate -label "WE LV"  {sim:/top_level/select_lv }    
add wave -noupdate -label "WE CPP" {sim:/top_level/select_cpp }    
add wave -noupdate -label "WE TOS" {sim:/top_level/select_tos }    
add wave -noupdate -label "WE OPC" {sim:/top_level/select_opc }
add wave -noupdate -label "WE H"   {sim:/top_level/select_h }

add wave -noupdate -divider "READ-ENABLE controls"
# Add read-enable (SP-register)
add wave -noupdate -label "B-bus Select" -radix B_bus_state {sim:/top_level/BselDemux}

add wave -noupdate -divider "Micro program Address pointer"
add wave -noupdate -label "Micro Addr" -radix hex {sim:/top_level/MicroProgramAddr}


#Set up initial conditions
#  A call was issued to the main1 instruction (address 0x00)
#  Next instruction is already loaded into MBR

#Alle read enable sat til 0
force -deposit sim:/top_level/mir(3:0) 16#FF

run 1ns

#MIR address
force -deposit sim:/top_level/mir(35:27) 16#00 
#JMPC
force -deposit sim:/top_level/mir(26) 0 0      
#JAMN
force -deposit sim:/top_level/mir(25) 0 0      
#JAMZ 
force -deposit sim:/top_level/mir(24) 0 0       
#Da JMPC=0, JAMN=0, JAMZ=0 bliver MPC=Addr

#Load MBR register with addess 0x10
force -deposit sim:/top_level/mbr/content 16#A5

#Load PC register with an initial address we can increment
force -deposit sim:/top_level/PC/content 16#3

#Fake some data in the program memmory
force -deposit sim:/top_level/ByteCodeData 16#42

run 20ns


#goto next instruction
 #set MicroProgram address to MBR's content
 force -deposit sim:/top_level/mir(35:27) 16#00
 #JMPC
 force -deposit sim:/top_level/mir(26) 1
 #JAMN
 force -deposit sim:/top_level/mir(25) 0
 #JAMZ 
 force -deposit sim:/top_level/mir(24) 0

 force -deposit sim:/top_level/mir(35) 0

#fetch next instruction
 #activate fetch flag
 force -deposit sim:/top_level/mir(4) 1
 #Deactivate read and write flag
 force -deposit sim:/top_level/mir(5) 0
 force -deposit sim:/top_level/mir(6) 0
#Increment program counter
 #We wish to put the PC on the B bus
  force -deposit sim:/top_level/mir(3:0) 10#1
 #dernæst ønskes alu sat til B+1
  force -deposit sim:/top_level/mir(16) 1
  force -deposit sim:/top_level/mir(17) 0
  force -deposit sim:/top_level/mir(18) 1
  force -deposit sim:/top_level/mir(19) 0
  force -deposit sim:/top_level/mir(20) 1
  force -deposit sim:/top_level/mir(21) 1
  force -deposit sim:/top_level/mir(22) 0
  force -deposit sim:/top_level/mir(23) 0
 #dernæst ønskes PC indlæst fra C bussen
  force -deposit sim:/top_level/mir(9) 1 

run 30ns


